Features:

• Fast, high-density Field Programmable Gate Arrays

- Densities from 50k to 1M system gates

- System performance up to 200 MHz

- 66-MHz PCI Compliant

- Hot-swappable for Compact PCI

• Multi-standard SelectIO™ interfaces

- 16 high-performance interface standards

- Connects directly to ZBTRAM devices

• Built-in clock-management circuitry

- Four dedicated delay-locked loops (DLLs) foradvanced clock control

- Four primary low-skew global clock distributionnets, plus 24 secondary local clock nets

• Hierarchical memory system

- LUTs configurable as 16-bit RAM, 32-bit RAM,16-bit dual-ported RAM, or 16-bit Shift Register

- Configurable synchronous dual-ported 4k-bitRAMs

- Fast interfaces to external high-performance RAMs

• Flexible architecture that balances speed and density

- Dedicated carry logic for high-speed arithmetic

- Dedicated multiplier support

- Cascade chain for wide-input functions

- Abundant registers/latches with clock enable, anddual synchronous/asynchronous set and reset

- Internal 3-state bussing

- IEEE 1149.1 boundary-scan logic

- Die-temperature sensor diode

• Supported by FPGA Foundation™ and AllianceDevelopment Systems

- Complete support for Unified Libraries, RelationallyPlaced Macros, and Design Manager

- Wide selection of PC and workstation platforms

• SRAM-based in

-system configuration

- Unlimited re-programmability

- Four programming modes

• 0.22 μm 5-layer metal process

• 100% factory tested