GENERAL DESCRIPTION：

The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPSanalog-to-digital converter (ADC) with an on-chip sample- and-holdcircuit designed for low cost, low power, small size, and ease ofuse. The product operates at a conversion rate of up to 125 MSPSand is optimized for outstanding dynamic performance and lowpower in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components are requiredfor many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) forcapturing data on the output and a frame clock output (FCO)for signaling a new output byte are provided. Individual-channelpower-down is supported and typically consumes less than 2 mWwhen all channels are disabled. The ADC contains several featuresdesigned to maximize flexibility and minimize system cost, suchas programmable output clock and data alignment and digital testpattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom userdefined test patterns entered via the serial port interface (SPI).The AD9253 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C.This product is protected by a U.S. patent.

FEATURES:

► 1.8 V supply operation

► Low power: 110 mW per channel at 125 MSPS with scalablepower options

► SNR = 74 dB (to Nyquist); SFDR = 90 dBc (to Nyquist)

► DNL = ±0.75 LSB (typical); INL = ±2.0 LSB (typical)

► Serial LVDS (ANSI-644, default) and low power, reduced signaloption (similar to IEEE 1596.3)

► 650 MHz full power analog bandwidth

► 2 V p-p input voltage range

► Serial port control

► Full chip and individual channel power-down modes

► Flexible bit orientation

► Built-in and custom digital test pattern generation

► Multichip sync and clock divider

► Programmable output clock and data alignment

► Programmable output resolution

► Standby mode

APPLICATIONS:

► Medical ultrasound

► High speed imaging

► Quadrature and diversity radio receivers

► Test equipment