Overview:
The eight latches are D-type transparent latches. When the latch-enable (LE) input is high, the Q outputs followthe data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high orlow logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive thebus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines inbus-organized systems without need for interface or pullup components.OE does not affect the internal operations of the latches. Old data can be retained or new data can be enteredwhile the outputs are in the high-impedance state.For specified high-impedance state during power up or power down, OE must be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Characteristics:
• Operating voltage range of 2V to 6V VCC
• Input voltage up to 6V
• Maximum tpd of 9.5ns at 5V
• Three-state non-inverting outputs for direct bus driving
• Supports full parallel load access
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