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AMD/XILINX XC3S400AN-4FGG400I Datesheet

The XC3S400AN-4FGG400I is a member of the Spartan®-3AN FPGA family from AMD (formerly Xilinx), combining the low-cost, high-performance features of the Spartan-3A architecture with integrated in-system Flash memory for configuration and nonvolatile data storage. Housed in a 400-pin FGG (BGA) package and rated for the industrial temperature range (–40°C to 100°C), this device offers 400K system gates, 8,064 logic cells, 16 dedicated 18x18 multipliers, 4 Digital Clock Managers (DCMs), and up to 360 Kbits of block RAM. The integrated Flash eliminates the need for external configuration PROMs, saving board space and enhancing design security with features such as buried configuration interface, unique Device DNA serial number, and MultiBoot support for multiple configuration files. It supports a wide range of single-ended and differential I/O standards (including LVDS, HSTL, and SSTL) and is fully supported by Xilinx ISE and WebPACK development tools, as well as MicroBlaze and PicoBlaze em

Introduction:

The Spartan®-3AN FPGA family combines the best attributes of aleading edge, low cost FPGA with nonvolatile technology across abroad range of densities. The family combines all the features ofthe Spartan-3A FPGA family plus leading technology in-systemFlash memory for configuration and nonvolatile data storage.The Spartan-3AN FPGAs are part of the Extended Spartan-3Afamily, which also includes the Spartan-3A FPGAs and the higherdensity Spartan-3A DSP FPGAs. The Spartan-3AN FPGA familyis excellent for space-constrained applications such as bladeservers, medical devices, automotive infotainment, telematics,GPS, and other small consumer products. Combining FPGA andFlash technology minimizes chip count, PCB traces and overallsize while increasing system reliability.The Spartan-3AN FPGA internal configuration interface iscompletely self-contained, increasing design security. The familymaintains full support for external configuration. The Spartan-3ANFPGA is the world’s first nonvolatile FPGA with MultiBoot,supporting two or more configuration files in one device, allowingalternative configurations for field upgrades, test modes, ormultiple system configurations.


Features:

The new standard for low cost nonvolatile FPGA solutions

• Eliminates traditional nonvolatile FPGA limitations with theadvanced 90 nm Spartan-3A device feature set

• Memory, multipliers, DCMs, SelectIO, hot swap, powermanagement, etc.

• Integrated robust configuration memory

• Saves board space

• Improves ease-of-use

• Simplifies design

• Reduces support issues

• Plentiful amounts of nonvolatile memory available to the user

• Up to 11+ Mb available

• MultiBoot support

• Embedded processing and code shadowing

• Scratchpad memory

• Robust 100K Flash memory program/erase cycles

• 20 years Flash memory data retention

• Security features provide bitstream anti-cloning protection

• Buried configuration interface

• Unique Device DNA serial number in each device fordesign Authentication to prevent unauthorized copying

• Flash memory sector protection and lockdown

• Configuration watchdog timer automatically recovers fromconfiguration errors

• Suspend mode reduces system power consumption

• Retains all design state and FPGA configuration data

• Fast response time, typically less than 100 μs

• Full hot-swap compliance

• Multi-voltage, multi-standard SelectIO™ interface pins

• Up to 502 I/O pins or 227 differential signal pairs

• LVCMOS, LVTTL, HSTL, and SSTL single-ended signalstandards

• 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling

• Up to 24 mA output drive

• 3.3V ±10% compatibility and hot swap compliance

• 622+ Mb/s data transfer rate per I/O

• DDR/DDR2 SDRAM support up to 400 Mb/s

• LVDS, RSDS, mini-LVDS, PPDS, and HSTL/SSTLdifferential I/O

• Abundant, flexible logic resources

• Densities up to 25,344 logic cells

• Optional shift register or distributed RAM support

• Enhanced 18 x 18 multipliers with optional pipeline

• Hierarchical SelectRAM™ memory architecture

• Up to 576 Kbits of dedicated block RAM

• Up to 176 Kbits of efficient distributed RAM

• Up to eight Digital Clock Managers (DCMs)

• Eight global clocks and eight additional clocks per each halfof device, plus abundant low-skew routing

• Complete Xilinx® ISE® and WebPACK™ softwaredevelopment system support

• MicroBlaze™ and PicoBlaze embedded processor cores

• Fully compliant 32-/64-bit 33 MHz PCI™ technology support

• Low-cost QFP and BGA Pb-free (RoHS) packaging options

• Pin-compatible with the same packages in theSpartan-3A FPGA family


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