GENERAL DESCRIPTION：

The ADP1740/ADP1741 are low dropout (LDO) CMOS linearregulators that operate from 1.6 V to 3.6 V and provide up to 2 Aof output current. These low VIN/VOUT LDOs are ideal for regulation of nanometer FPGA geometries operating from 2.5 V downto 1.8 V I/O rails, and for powering core voltages down to 0.75 V.Using an advanced, proprietary architecture, the ADP1740/ADP1741 provide high power supply rejection ratio (PSRR) andlow noise, and achieve excellent line and load transient responsewith only a small 4.7 µF ceramic output capacitor.The ADP1740 is available in seven fixed output voltage options.The ADP1741 is an adjustable version that allows output voltages ranging from 0.75 V to 3.3 V via an external divider.The ADP1740/ADP1741 allow an external soft start capacitorto be connected to program the startup. A digital power-goodoutput allows power system monitors to check the health of theoutput voltage.The ADP1740/ADP1741 are available in a 16-lead, 4 mm ×4 mm LFCSP, making them not only very compact solutions,but also providing excellent thermal performance for applications that require up to 2 A of output current in a small, lowprofile footprint.

FEATURES：

Maximum output current: 2 A

Input voltage range: 1.6 V to 3.6 V

Low shutdown current: 2 µA

Low dropout voltage: 160 mV at 2 A load

Initial accuracy: ±1%

Accuracy over line, load, and temperature: ±2%

7 fixed output voltage options with soft start:0.75 V to 2.5 V (ADP1740)

Adjustable output voltage options with soft start:0.75 V to 3.3 V (ADP1741)

High PSRR

65 dB at 1 kHz

65 dB at 10 kHz

54 dB at 100 kHz

23 μV rms at 0.75 V output

Stable with small 4.7 µF ceramic output capacitor

Excellent load and line transient response

Current-limit and thermal overload protection

Power-good indicator

Logic-controlled enable

Reverse current protection

APPLICATIONS：

Server computers

Memory components

Telecommunications equipment

Network equipment

DSP/FPGA/microprocessor supplies

Instrumentation equipment/data acquisition systems