Description:

The P25Q128L is a serial interface Flash memory device designed for use in a wide variety of high-volume 

consumer based applications in which program code is shadowed from Flash memory into embedded or 

external RAM for execution. The flexible erase architecture of the device, with its page erase granularity it is 

ideal for data storage as well, eliminating the need for additional data storage devices. 

The erase block sizes of the device have been optimized to meet the needs of today's code and data storage 

applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. 

Because certain code modules and data storage segments must reside by themselves in their own erase 

regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash 

memory devices can be greatly reduced. This increased memory space efficiency allows additional code 

routines and data storage segments to be added while still maintaining the same overall device density. 

The device also contains an additional 3*1024-byte security registers with OTP lock (One-Time 

Programmable), can be used for purposes such as unique device serialization, system-level Electronic Serial 

Number (ESN) storage, locked key storage, etc. 

Specifically designed for use in many different systems, the device supports read, program, and erase 

operations with a wide supply voltage range of 1.65V to 2.0V. No separate voltage is required for 

programming and erasing. 

Overview：

General:

 Single 1.65V to 2.00V supply 

 Industrial Temperature Range -40C to 85C 

 Serial Peripheral Interface (SPI) Compatible: Mode 0 and Mode 3 

 Single, Dual, Quad SPI, QPI, DTR 

- Standard SPI: SCLK,CS#,SI,SO,WP#,HOLD# 

- Dual SPI: SCLK,CS#,IO0,IO1,WP#, HOLD# 

- Quad SPI: SCLK,CS#,IO0,IO1,IO2,IO3 

- QPI: SCLK,CS#,IO0,IO1,IO2,IO3 

- DTR: Double Transfer Rate Read 

 Flexible Architecture for Code and Data Storage 

- Uniform 256-byte Page Program 

- Uniform 256-byte Page Erase 

- Uniform 4K-byte Sector Erase 

- Uniform 32K/64K-byte Block Erase 

- Full Chip Erase 

 Hardware Controlled Locking of Protected Sectors by WP Pin 

 One Time Programmable (OTP) Security Register 

- 3*1024-Byte Security Registers With OTP Lock 

 128 bit unique ID for each device 

 Fast Program and Erase Speed 

- 1.5ms Page program time 

- 16ms Page erase time 

- 16ms 4K-byte sector erase time 

- 16ms 32K/64K-byte block erase time 

 JEDEC Standard Manufacturer and Device ID Read Methodology 

 Ultra Low Power Consumption 

- 0.5uA Deep Power Down current 

- 15.0uA Standby current 

- 3.0mA Active Read current at 33MHz 

- 2.5mA Active Program or Erase current 

 High Reliability 

- 100,000 Program / Erase Cycles 

- 20-year Data Retention 

 Industry Standard Green Package Options 

- 8-pin SOP (208mil) 

- 8-Lead VSOP(208mil) 

- 8-land WSON (6x5mm) 

- 16-Lead SOP (300mil) 

- 24-ball TFBGA (8x6mm 6x4 ball array) 

- KGD for SiP