Features:

Core

• 32-bit Arm® Cortex®-M7 core with doubleprecision FPU and L1 cache: 16 Kbytes of dataand 16 Kbytes of instruction cache; frequencyup to 480 MHz, MPU, 1027 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSPinstructionsMemories

• Up to 2 Mbytes of Flash memory with readwhile-write support

• Up to 1 Mbyte of RAM: 192 Kbytes of TCMRAM (inc. 64 Kbytes of ITCM RAM +128 Kbytes of DTCM RAM for time criticalroutines), Up to 864 Kbytes of user SRAM, and4 Kbytes of SRAM in Backup domain

• Dual mode Quad-SPI memory interfacerunning up to 133 MHz

• Flexible external memory controller with up to32-bit data bus: SRAM, PSRAM,SDRAM/LPSDR SDRAM, NOR/NAND Flashmemory clocked up to 100 MHz inSynchronous mode

• CRC calculation unitSecurity

• ROP, PC-ROP, active tamperGeneral-purpose input/outputs

• Up to 168 I/O ports with interrupt capabilityReset and power management

• 3 separate power domains which can beindependently clock-gated or switched off:

– D1: high-performance capabilities

– D2: communication peripherals and timers

– D3: reset/clock control/power management

• 1.62 to 3.6 V application supply and I/Os

• POR, PDR, PVD and BOR

• Dedicated USB power embedding a 3.3 Vinternal regulator to supply the internal PHYs

• Embedded regulator (LDO) with configurablescalable output to supply the digital circuitry

• Voltage scaling in Run and Stop mode (6configurable ranges)

• Backup regulator (~0.9 V)

• Voltage reference for analog peripheral/VREF+

• Low-power modes: Sleep, Stop, Standby andVBAT supporting battery chargingLow-power consumption

• VBAT battery operating mode with chargingcapability

• CPU and domain power state monitoring pins

• 2.95 µA in Standby mode (Backup SRAM OFF,RTC/LSE ON)Clock management

• Internal oscillators: 64 MHz HSI, 48 MHzHSI48, 4 MHz CSI, 32 kHz LSI

• External oscillators: 4-48 MHz HSE,32.768 kHz LSE

• 3× PLLs (1 for the system clock, 2 for kernelclocks) with Fractional mode