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Altera EPF10K50RI240-4N

Altera’s FLEX 10K devices are the industry’s first embedded PLDs. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the FLEX 10K family provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.

Features:

 ■ The industry's first embedded programmable logic device (PLD)family, providing System-on-a-Programmable-Chip (SOPC)integration

– Embedded array for implementing megafunctions, such asefficient memory and specialized logic functions

– Logic array for general logic functions

■ High density

– 10,000 to 250,000 typical gates (see Tables 1 and 2)

– Up to 40,960 RAM bits; 2,048 bits per embedded array block(EAB), all of which can be used without reducing logic capacity

■ System-level features

– MultiVoltTM I/O interface support

– 5.0-V tolerant input pins in FLEX® 10KA devices

– Low power consumption (typical specification less than 0.5 mAin standby mode for most devices)

– FLEX 10K and FLEX 10KA devices support peripheralcomponent interconnect Special Interest Group (PCI SIG) PCILocal Bus Specification, Revision 2.2

– FLEX 10KA devices include pull-up clamping diode, selectableon a pin-by-pin basis for 3.3-V PCI compliance

– Select FLEX 10KA devices support 5.0-V PCI buses with eight orfewer loads

– Built-in Joint Test Action Group (JTAG) boundary-scan test(BST) circuitry compliant with IEEE Std. 1149.1-1990, availablewithout consuming any device logic


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