GENERAL DESCRIPTION:

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS analog-to-digital converter (ADC) designed fordigitizing high frequency, wide dynamic range signals withinput frequencies of up to 300 MHz.The dual ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. EachADC features wide bandwidth, differential sample-and-holdanalog input amplifiers, and shared integrated voltage reference,which eases design considerations. A duty cycle stabilizer isprovided to compensate for variations in the ADC clock dutycycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external16-bit output ports or multiplexed on a single 16-bit bus. Theseoutputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings,when desired.Programming for setup and control is accomplished using a 3-wireSPI-compatible serial interface.The AD9650 is available in a 64-lead LFCSP and is specified overthe industrial temperature range of −40°C to +85°C.

FEATURES:

1.8 V analog supply operation

1.8 V CMOS or LVDS output supply

SNR

82 dBFS at 30 MHz input and 105 MSPS data rate

83 dBFS at 9.7 MHz input and 25 MSPS data rate

SFDR

90 dBc at 30 MHz input and 105 MSPS data rate

95 dBc at 9.7 MHz input and 25 MSPS data rate

Low power

328 mW per channel at 105 MSPS

119 mW per channel at 25 MSPS

Integer 1-to-8 input clock divider

IF sampling frequencies to 300 MHz

Analog input range of 2.7 V p-p

Optional on-chip dither

Integrated ADC sample-and-hold inputs

Differential analog inputs with 500 MHz bandwidth

ADC clock duty cycle stabilizer

APPLICATIONS:

Industrial instrumentation

X-Ray, MRI, and ultrasound equipment

High speed pulse acquisition

Chemical and spectrum analysis

Direct conversion receivers

Multimode digitalreceivers

Smart antenna systems

General-purpose software radios